Designing for Reuse of Configurable Logic

Field-programmable gate arrays (FPGAs) offer electronic systems designers the opportunity to reduce development cost, reduce time-to-market, increase system performance, and improve system adaptability. As FPGAs become larger and more complex, the process of developing firmware for them has evolved to include similarities with the design of complex software subsystems. Reuse of FPGA firmware components can further reduce the system development cost and time-to-market, while also providing product quality improvements.

This technical report provides an overview of a generic FPGA firmware design process and identifies the resulting work products that may be suitable for reuse in future development efforts. It provides a brief summary of research done in the field of software reuse and highlights its applicability to FPGA firmware. This report also provides guidance to developers on the evaluation of firmware components to determine their suitability for reuse and discusses actions that can be taken by both acquirers and developers to produce reusable FPGA firmware.

PDF [631 KB]

Author

Joseph P. Elm

This report is related to the following area(s) of work:

Acquisition Support

Technical Report
CMU/SEI-2005-TR-016
July 2005

Cite This Report

SEI:

Elm, Joseph; Designing for Reuse of Configurable Logic (CMU/SEI-2005-TR-016). Software Engineering Institute, Carnegie Mellon University, 2005. http://www.sei.cmu.edu/library/abstracts/reports/05tr016.cfm

IEEE:

J. Elm, "Designing for Reuse of Configurable Logic," Software Engineering Institute, Carnegie Mellon University, Pittsburgh, Pennsylvania, Technical Report CMU/SEI-2005-TR-016, 2005. http://www.sei.cmu.edu/library/abstracts/reports/05tr016.cfm

APA:

Elm, J., (2005). Designing for Reuse of Configurable Logic (CMU/SEI-2005-TR-016). Retrieved May 20, 2013, from the Software Engineering Institute, Carnegie Mellon University website: http://www.sei.cmu.edu/library/abstracts/reports/05tr016.cfm

CHI:

Elm, Joseph, Designing for Reuse of Configurable Logic (CMU/SEI-2005-TR-016). Pittsburgh, PA: Software Engineering Institute, Carnegie Mellon University, 2005. http://www.sei.cmu.edu/library/abstracts/reports/05tr016.cfm

MLA:

Elm, J., 2005. Designing for Reuse of Configurable Logic (Technical Report CMU/SEI-2005-TR-016). Pittsburgh: Software Engineering Institute, Carnegie Mellon University. http://www.sei.cmu.edu/library/abstracts/reports/05tr016.cfm

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