Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)
Control system components are sensitive to the end-to-end latency and age of signal data. They are also affected by variation (jitter) in latency and age values due to different runtime configurations (i.e., sampling or data-driven signal processing pipelines, dissimilar communication mechanisms, partitioned architectures, and globally synchronous versus asynchronous hardware). This technical note introduces an analysis framework designed to calculate the end-to-end latency and age of signal stream data as well as their jitter. The latency analysis framework and calculations are illustrated in the context of an example model that uses the flow specification notation of the Architecture Analysis & Design Language (AADL). The report describes how this latency analysis capability can be used to determine worst-case end-to-end latency on system models of different fidelity and how it accounts for partitioned architectures. It also summarizes the worst-case end-to-end flow latency analysis capability provided by the Open Source AADL Tool Environment (OSATE) flow latency analysis plug-in.
This report is related to the following area(s) of work:
Performance and DependabilitySoftware Architecture
Technical Note
CMU/SEI-2007-TN-010
December 2007
Cite This Report
SEI:
Feiler, Peter; & Hansson, Jörgen. Flow Latency Analysis with the Architecture Analysis and Design Language (AADL) (CMU/SEI-2007-TN-010). Software Engineering Institute, Carnegie Mellon University, 2007. http://www.sei.cmu.edu/library/abstracts/reports/07tn010.cfm
IEEE:
P. Feiler, and J. Hansson, "Flow Latency Analysis with the Architecture Analysis and Design Language (AADL)," Software Engineering Institute, Carnegie Mellon University, Pittsburgh, Pennsylvania, Technical Note CMU/SEI-2007-TN-010, 2007. http://www.sei.cmu.edu/library/abstracts/reports/07tn010.cfm
APA:
Feiler, P., & Hansson, J. (2007). Flow Latency Analysis with the Architecture Analysis and Design Language (AADL) (CMU/SEI-2007-TN-010). Retrieved May 24, 2013, from the Software Engineering Institute, Carnegie Mellon University website: http://www.sei.cmu.edu/library/abstracts/reports/07tn010.cfm
CHI:
Feiler, Peter, and Jörgen Hansson. Flow Latency Analysis with the Architecture Analysis and Design Language (AADL) (CMU/SEI-2007-TN-010). Pittsburgh, PA: Software Engineering Institute, Carnegie Mellon University, 2007. http://www.sei.cmu.edu/library/abstracts/reports/07tn010.cfm
MLA:
Feiler, P., & Hansson, J. 2007. Flow Latency Analysis with the Architecture Analysis and Design Language (AADL) (Technical Report CMU/SEI-2007-TN-010). Pittsburgh: Software Engineering Institute, Carnegie Mellon University. http://www.sei.cmu.edu/library/abstracts/reports/07tn010.cfm
Find Us Here
Share This Page
For more information
