# Speed Regulation Example

This example shows an analytical architectural-fault-modeling approach can be used to model speed regulation in a self-driving automobile.

A complete description this example is available in the case-study is available in the handout materials for the webinar [Architecture Analysis with
AADL
The Speed Regulation CaseStudy](https://resources.sei.cmu.edu/asset_files/Webinar/2014_018_101_424910.pdf)

### Organization of the example

The two implementations are in integration.aadl as integration.implementation1 and integration.implementation2. 

The diagrams shown in slides 41 and 42 correspond almost exactly to the diagrams that are generated by right clicking on the desired implementation model and selecting "Create Diagram". The resulting diagram will be missing the actual processer bindings shown in the slides. To show those right click on the diagram and select "Configure Diagram". In the AADL Properties section towards the bottom select Add->deployment properties->actual processor binding.

### Analyses supported by this model
* EMV
* Latency
* Resources and Budgets

### Differences from the webinar handout

The FTA and Fault Impact analyses results cannot be duplicated in the current version of OSATE. The webinar relied on tools that have since been deprecated. There are only minor differences in the model itself.

### Conducting analysis

To analyze implementation 1 or implementation 2 select it (integration.aadl integration.implementation1 or integration.implementation2) and right-click "Instantiate". Then select one of the instantiations, right-click and choose the Analyses menu item.

* FHA results are identical to the presentation
* FTA results are not comparable (see above)
* Fault Impact results are not comparable (see above)


6/11/2020

